A simple triggering circuit can be constructed from a monostable vibrator and a Schmitt trigger. Here, though, we describe a slightly more sophisticated approach based on a phase-locked loop (PLL) . The phase-locked loop circuit has the advantage that it allows us to trigger more than once each forcing period. This feature will be useful when we come to digitizing a signal because the phase-locked loop circuit can be used to trigger a digitizer an integer number k times each forcing period, thereby giving us k samples of the trajectory each cycle.
A good account of all things electronic, including phase-locked loops, is presented in the book by Horowitz and Hill, The art of electronics. For our purposes, a phase-locked loop chip contains a phase detector, an amplifier, and a voltage-controlled oscillator (VCO), in one package. A PLL, when used in conjunction with a stage counter, generates a clock signal (or triggering pulse) that is ideal for constructing a Poincaré section. A schematic of the triggering circuit used with the string apparatus is presented in Figure 3.23, and is constructed from two off-the-shelf chips: a CMOS 4046 PLL and a 4040 stage counter.
Figure 3.23: Triggering circuit used to construct a Poincaré map in
the string apparatus.
(Courtesy of K. Adams and T. C. A. Molteno.)
This circuit, with small adjustments, is useful for generating a triggering signal in any forced system. The counter is set to one for a Poincaré section; that is, it generates one pulse each period. It can be readjusted to produce k pulses per period when digitizing.